UFOA0=NONE, UFOA1=NONE, REPMODE=FREE
Control Register
REPMODE | Repeat Mode 0 (FREE): When started, the LETIMER counts down until it is stopped by software. 1 (ONESHOT): The counter counts REP0 times. When REP0 reaches zero, the counter stops. 2 (BUFFERED): The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero. Else the counter stops 3 (DOUBLE): Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero |
UFOA0 | Underflow Output Action 0 0 (NONE): LETn_O0 is held at its idle value as defined by OPOL0. 1 (TOGGLE): LETn_O0 is toggled on CNT underflow. 2 (PULSE): LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0. 3 (PWM): LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 |
UFOA1 | Underflow Output Action 1 0 (NONE): LETn_O1 is held at its idle value as defined by OPOL1. 1 (TOGGLE): LETn_O1 is toggled on CNT underflow. 2 (PULSE): LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1. 3 (PWM): LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 |
OPOL0 | Output 0 Polarity |
OPOL1 | Output 1 Polarity |
BUFTOP | Buffered Top |
COMP0TOP | Compare Value 0 Is Top Value |
RTCC0TEN | RTC Compare 0 Trigger Enable |
RTCC1TEN | RTC Compare 1 Trigger Enable |
DEBUGRUN | Debug Mode Run Enable |